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1 NUMBER SYSTEMS1

1.1 Binary Number System3

1.2 Binary to Decimal Conversion4

1.3 Decimal to Binary Conversion6

1.4 Octal Number System9

1.5 Binary to Octal Conversion11

1.6 Octal to Binary Conversion12

1.7 Hexadecimal Number System13

1.8 Binary to Hexadecimal Conversion14

1.9 Hexadecimal to Binary Conversion15

1.10 Binary-Coded Decimal(BCD)16

1.11 Binary Addition20

1.12 Binary Subtraction22

1.13 Troubleshooting a 4-Bit Adder24

Digital Application26

Summary27

Questions and Problems28

Lab 1A 7483 4-Bit Full Adder30

Lab 1B 4008 4-Bit Full Adder36

2 LOGIC GATES41

2.1 Gates43

2.2 Inverters43

2.3 OR Gates45

2.4 AND Gates50

2.5 NAND Gates55

2.6 NOR Gates59

2.7 Data Control Enable/Inhibit63

2.8 AND Gate Enable/Inhibit63

2.9 NAND Gate Enable/Inhibit64

2.10 OR Gate Enable/Inhibit65

2.11 NOR Gate Enable/Inhibit66

2.12 Summary Enable/Inhibit67

2.15 Expanding an AND Gate68

2.14 NOR as an Inverter68

2.13 NAND as an Inverter68

2.16 Expanding a NAND Gate69

2.17 Expanding an OR Gate69

2.18 Expanding a NOR Gate69

2.19 Troubleshooting Gates70

Digital Application71

Summary72

Questions and Problems74

Lab 2A Gates78

Lab 2B Gates82

3 WAVEFORMS AND BOOLEAN ALGEBRA85

3.1 Waveform Analysis87

3.2 Delayed-Clock and Shift-Counter Waveforms90

3.3 Combinational Logic98

3.4 Boolean Theorems100

3.5 DeMorgan s Theorems107

3.6 Designing Logic Circuits112

3.7 AND-OR-Invert Gates123

3.8 Reducing Boolean Expressions Using Karnaugh Maps126

3.9 Programmable Logic Devices128

3.10 Troubleshooting Combinational Logic Circuits132

Digital Application134

Summary135

Questions and Problems137

Lab 3A Boolean Algebra146

Lab 3B Logic Converter150

4 EXCLUSIVE-OR GATES153

4.1 Exclusive-OR155

4.2 Enable/Inhibit158

4.3 Waveform Analysis159

4.4 Exclusive-NOR160

4.5 Parity162

4.6 Even-Parity Generator164

4.7 Even/Odd-Parity Generator166

4.8 Parity Checker168

4.9 9-Bit Parity Generator/Checker170

4.10 Comparator175

4.11 Programmable Logic Devices181

4.12 Troubleshooting Exclusive-OR Circuits193

Digital Application194

Summary195

Questions and Problems196

Lab 4A Exclusive-Or200

Lab 4B Parity Generator/Checker202

5 ADDERS205

5.1 Half Adder207

5.2 Full Adder208

5.3 Binary 1 s Complement Subtraction216

5.4 1 s Complement Adder/Subtractor Circuit218

5.5 Binary 2 s Complement Subtraction223

5.6 2 s Complement Adder/Subtractor Circuit226

5.7 Signed 2 s Complement Numbers232

5.8 Binary-Coded-Decimal Addition238

5.9 Binary-Coded-Decimal Adder Circuit240

5.10 Arithmetic Logic Unit(ALU)243

5.11 Programming a GAL245

5.12 Troubleshooting Adder Circuits252

Digital Application254

Summary254

Questions and Problems256

Lab 5A Adders260

Lab 5B Adder Circuits262

6 SPECIFICATIONS AND OPEN-COLLECTOR GATES265

6.1 TTL Subfamilies267

6.2 TTL Electrical Characteristics267

6.3 TTL Supply Currents273

6.4 TTL Switching Characteristics274

6.5 TTL Open-Collector Gates278

6.6 Open-Collector Applications280

6.7 CMOS282

6.8 CMOS Subfamilies282

6.9 CMOS Specifications285

6.10 Interfacing TTL to CMOS288

6.11 Low Voltage CMOS291

6.12 Emitter Coupled Logic(ECL)293

6.13 Interfacing ECL to Other Logic Families295

6.14 Surface Mount Technology296

6.15 GAL Specifications298

6.16 Troubleshooting TTL and CMOS Devices299

Digital Application300

Summary302

Questions and Problems302

Lab 6A Specifications and Open-Collector Gates304

Lab 6B Specifications and Open-Drain Inverters307

7 FLIP-FLOPS309

7.2 Crossed NAND SET-RESET Flip-Flops311

7.1 Introduction to Flip-Flops311

7.3 Crossed NOR SET-RESET Flip-Flops313

7.4 Comparison of the Crossed NAND and the Crossed NOR SET-RESET Flip-Flops315

7.5 Using a SET-RESET Flip-Flop as a Debounce Switch316

7.6 The Gated SET-RESET Flip-Flop317

7.7 The Transparent D Flip-Flop319

7.8 The Master-Slave D Flip-Flop322

7.10 SET-RESET NAND Gate Flip-Flops Using a PLD328

7.9 The Pulse Edge-Triggered D Flip-Flop328

7.11 Troubleshooting a Digital Circuit333

Digital Application335

Summary336

Questions and Problems337

Lab 7A Flip-Flops339

Lab 7B Flip-Flops340

8 MASTER-SLAVE D AND JK FLIP-FLOPS341

8.1 Toggling a Master-Slave D Flip-Flop343

8.2 The JK Flip-Flop344

8.3 The Nonoverlapping Clock347

8.4 The Shift Counter349

8.5 Typical JK Flip-Flop ICS352

Making a Nonoverlapping Clock353

Trouble Shooting JK Flip-Flops358

Digital Application361

Summary362

Questions and Problems362

Lab 8A Shift Counter and Delayed Clock365

Lab 8B JK Flip-Flops368

9 SHIFT REOSTFRS369

9.1 Shift Register Constructed from JK Flip-Flops371

9.2 Parallel and Serial Data372

9.3 Parallel-In Serial-Out373

9.4 Serial Data Transmission Formats375

9.5 IC Shift Registers379

9.6 Serial Data Standards382

9.7 The ASCII Code386

9.8 Making an 8-Bit Shift Register with an Asynchronous Clear from the GAL 16V8B Programmable Logic Device388

9.9 Troubleshooting an RS-232C System388

Digital Application392

Summary393

Questions and Problems393

Lab 9A Shift Registers395

Lab 9B Shift Registers403

10 COUNTERS405

10.1 The Ripple Counter407

10.2 The Decode-and-Clear Method of Making a Divide-By-N Ripple Counter408

10.3 The Divide-By-N Synchronous Counter410

10.4 Presettable Counters414

10.5 The Up-Down Counter416

10.6 Typical MSI Counter ICs419

10.7 The Divide-By-N？ Counter425

10.8 Making a Divide-by-16 Synchronous Counter426

10.9 Troubleshooting Counters427

Digital Application430

Summary431

Questions and Problems432

Lab 10A Counters434

Lab 10B Counters437

11 SCHMITT-TRIGGER INPUTS AND CLOCKS439

11.1 The Schmitt-Trigger Input441

11.2 Using a Schmitt Trigger to Square Up an Irregular Wave441

11.3 A Schmitt-Trigger Clock442

11.4 The 555 Timer Used as a Clock445

11.5 Crystal Oscillators451

11.6 Troubleshooting Clock Circuits452

Digital Application454

Summary455

Questions and Problems456

Lab 11A Schmitt Triggers and Clocks459

Lab 11B Clocks461

12 ONE-SHOTS463

12.1 A One-Shot Debounce Switch465

12.2 The Pulse Stretcher465

12.3 The Retriggerable One-Shot467

12.4 The Nonretriggerable One-Shot469

12.5 The 555 as a One-Shot470

12.6 The 74121 and 741S122471

12.7 The Data Separator473

12.8 Troubleshooting One-Shots475

Digital Application477

Summary478

Questions and Problems478

Lab 12A One-Shots481

Lab 12B One-Shots483

13 DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERSIONS485

13.1 Resistor Networks for Digital-to-Analog Conversion487

13.2 The TTL Digital-to-Analog Converter491

13.3 Analog-to-Digital Conversion Using Voltage Comparators494

13.4 The Count-Up and Compare Analog-to-Digital Converter496

13.5 The Successive Approximation Analog-to-Digital Converter498

13.6 The DAC0830 Digital-to-Analog Converter Integrated Circuit502

13.7 Making the Logic for a 3-Bit Voltage Comparator Analog-to-Digital Converter505

13.8 Troubleshooting Digital-to-Analog Converters506

Digital Application509

Summary511

Questions and Problems511

Lab 14A Digital-to-Analog and Analog-to-Digital513

Lab 14B Analog-to-Digital Converters515

14 DECODERS,MULTIPLEXERS,DEMULTIPLEXERS,AND DISPLAYS517

14.1 Decoders519

14.2 Demultiplexers521

14.4 Using a Multiplexer to Reproduce a Desired Truth Table522

14.3 Multiplexers522

14.5 Multiplexer and Demultiplexer ICs525

14.6 The 8-Trace Oscilloscope Multiplexer528

14.7 The Light-Emitting Diode530

14.8 The Seven-Segment Display532

14.9 The Liquid Crystal Display536

14.10 Making a 3-to-8 Decoder from the GAL 16V8B Programmable Logic Device539

14.11 Troubleshooting Decoders543

Digital Application545

Summary546

Questions and Problems547

Lab 14a Multiplexers,LEDs,and Seven-Segment Displays549

Lab 14B LEDs553

15 TRI-STATE GATES AND INTERFACING TO HIGH CURRENT555

15.1 Tri-State Gates557

15.2 Tri-State Inverters and Buffers559

15.3 Computer Buses and the Tri-State Gate562

15.4 Buffering to High Current and High Voltage564

15.5 Multiplexing Seven-Segment LED Displays567

15.6 Isolating One Circuit from Another with Optocouplers569

15.7 Insulated Gate Bipolar Transistor(IGBT)570

15.8 Troubleshooting High-Current Digital Circuits572

Digital Application573

Summary574

Questions and Problems575

Lab 15A Tri-State Gates577

Lab 15B High-Current Interface578

16 MEMORIES AND INTRODUCTION TO MICROCOMPUTERS579

16.1 The Microcomputer and Its Parts581

16.2 The Central Processing Unit581

16.3 Computer Memory584

16.4 ROM585

16.5 PROM586

16.6 EPROM586

16.7 EEPROM591

16.8 Static RAM592

16.9 Dynamic RAM593

16.10 The Input/Output of the Computer597

16.11 The Program600

16.12 The Microcontroller602

Digital Application604

Summary606

Questions and Problems606

Lab 16 RAM608

Appendixes611

A Lab Trainer Plans613

B Equipment Needed617

C Pinouts619

D NAND Gates,MOS,and CMOS627

Glossary633

Answers to Self-Check and Odd-Numbered Questions and Problems643

Index717